Semiconductor power switches are provided, by way of example, as high-side switching elements between a DC motor as an inductive load, on the one hand, and the positive supply voltage or as low-side switching elements between the inductive load and the negative supply voltage.
As FIG. 1 shows, low-side power switches actuate an inductive load L using freewheeling diodes D which open a current path for the current through the inductance L to decay when a current path through the low-side switch and the inductive load L arranged in series with the low-side switch is disconnected. In the simplest case of actuating the inductive load L, the network node Q1 is connected to a positive supply voltage +V and a further connection Q3 is connected to a negative supply voltage −V or GND.
In more recent designs, both the freewheeling diode D and the power switch M are provided as an integral power switching arrangement SPT in the same semiconductor substrate in this case. The connections of the integral power switching arrangement P are routed to the network nodes Q1, Q2 and Q3.
Regardless of whether the freewheeling diode D is in the form of a discrete component or a diode structure D integrated into the integral power switching arrangement P, its connections are externally accessible in the case of transport and therefore need to be provided in a form protected against electrostatic loading (ESD, electrostatic discharge).
In conventional integral power switching arrangements with an integrated freewheeling diode, the low-side switch and the freewheeling diode, for example, are formed in n-doped well structures. The n-doped well structures are supported by a base substrate provided with a p-basic doping and are insulated from one another by vertical p-doped isolating sinker structures. In the case of a diode, the n-well can form a cathode. The anode is formed by a p-doped well which is enclosed by the n-well in the region of the semiconductor substrate. The p-well, the n-well enclosing the p-well and the p-doped base substrate form a pnp-substrate structure.
When the diode structure is operated in the forward direction, a charge carrier current flows from the inner p-well to the n-well. A significant part thereof is not collected directly by the cathode but rather enters the base substrate through the n-well. The base substrate has comparatively high resistance on account of the low doping and is normally connected to the negative supply potential or to GND potential. As a result, just an anode voltage of several volts with respect to the negative supply potential is sufficient to substantiate a disadvantageous comparatively high thermal power loss from the diode structure. In addition, the voltage drop in the base substrate actuates and activates a further parasitic npn-transistor formed by two respective adjacent n-wells and the intermediate portion of the base substrate, so that additional transport of charge carriers between the two adjacent n-wells is initiated.
Such a diode structure requires complex guard rings and substrate connections (which need to be formed in suitable fashion) in order to effectively remove charge carriers or holes transferred to the base substrate by the parasitic substrate transistor.
A further effect which results in charge carriers entering the base, substrate is the parallel-path current case. The parallel-path current case arises, by way of example, when a drain voltage in a power switching element, for example a DMOSFET (diffused metal oxide semiconductor field effect transistor), falls below the potential of the base substrate. In this case, electrons are injected into the base substrate from the DMOSFET's drain structure and are collected in part by adjacent n-wells.
A drawback of the described form of the diode is accordingly particularly the high thermal power loss as a result of the high substrate current in the diode's on-state mode, and also a current induced by an npn-substrate transistor between adjacent n-wells.
An alternative arrangement, in which the high gain of the substrate transistor is advantageously reduced, is the form of the diode as a low leakage diode. A conventional low leakage diode is shown in FIG. 2 in greatly simplified cross section. The cross section has been overlaid by a schematic illustration of an equivalent circuit diagram of the real low leakage diode.
The pn-junction of the diode D is formed between an inner, n-doped well 4 and a central, p-doped well 3. The diode formed from the two wells 4, 3 is for its part embedded in a highly n-doped, outer well 2 and is isolated from a surrounding p-conductive structure 6 in the semiconductor substrate 1 by the outer well 2. In a portion which adjoins the substrate surface 10, the inner well 4 has an inner contact region 41 with an n-doping which is higher than a basic doping in the inner well 4. Similarly, a central contact region 31 which is highly p-doped in comparison with the surrounding central well 3 is formed in that portion of the central well 3 which is close to the surface, and an outer contact region 21 which is highly n-doped is formed in that portion of the outer well 2 which adjoins the substrate surface 10. The inner contact region 41 is connected to a cathode connection K. An anode connection A is formed in the region of the central contact regions 31. Contact is made with the outer well 2 in the region of the outer contact regions 21, said outer well 2 being connected to the anode connection and being placed at the anode potential in the exemplary embodiment shown.
The outer n-well 2 needs to be connected to the same potential as the central p-well 3. When the diode structure is in the on-state mode, charge carriers passing through the central well are soaked up by the outer n-well. In the parallel-path current case, the pn-junction between the central well and the outer well is always blocked and the charge carriers are offloaded via the outer well's connection.
In addition, the equivalent circuit diagram shows a parasitic npn-well transistor T2 which is actuated via the bulk resistance R2 of the central, p-conductive well 3 and acts between the inner, n-conductive well 4 and the outer, n-conductive well 2.
It has been found that the diode structure described in FIG. 2 has, in practice, a low stability with respect to electrostatic loading on the cathode and anode connections.